China’s CXMT defends bet on risky new DRAM architecture to circumvent US chip curbs

Chinese memory chip giant ChangXin Memory Technologies (CXMT) is pressing ahead with an alternative chip architecture that US rival Micron Technology has chosen to bypass, highlighting an industry divide over how best to pack more data onto silicon under cost and geopolitical constraints.
The Hefei-based company planned to send customers samples of its first server-grade dynamic random-access memory (DRAM) product built on the 4F² architecture by the end of this year, according to a summary of its latest earnings briefing released on Saturday.
A timeline for mass production was not disclosed. CXMT said commercial roll-out would depend on client validation and market demand.
For CXMT, China’s leading DRAM maker, the shift represented a critical workaround to US export restrictions, according to analysts.
Washington’s curbs have barred Chinese chipmakers from buying advanced extreme ultraviolet (EUV) lithography systems from Dutch supplier ASML, cutting off the standard route used by global peers to shrink memory circuitry.
In a research note on Wednesday, BofA Securities said 4F² offered an alternative path to higher memory density without requiring EUV tools. Successful volume manufacturing could strengthen CXMT’s competitiveness, the bank noted, while cautioning that the process brought higher costs and execution risks.

DRAM chips provide the high-speed working memory essential for devices ranging from smartphones to servers in artificial intelligence data centres. As computing workloads surge, manufacturers are looking for ways to cram more capacity onto each silicon wafer.
Conventional DRAM chips rely on a 6F² layout. By adopting a tighter layout, the 4F² design shrinks each cell footprint by roughly a third at the same feature size, potentially allowing more bits to fit within the same area.
However, the architecture requires additional manufacturing steps and risks lower production yields, which can erode its cost benefits.
Micron, the largest US memory producer, remains sceptical that the design makes economic sense at the most advanced level.
At a webinar last month, Micron’s president and chief technology and products officer Scott DeBoer said physical limits, specifically the spacing of charge-storing capacitors, ultimately determined how dense memory chips could be.
It’s more complicated, it’s more complex, it’s more costly
“It’s more complicated, it’s more complex, it’s more costly,” DeBoer said of manufacturing 4F² chips on older production nodes. Micron Technology plans to keep improving its existing design while developing three-dimensional DRAM, which stacks memory cells vertically.
DeBoer added that Micron Technology had researched 4F² for more than two decades and built prototypes, but it found fundamental limits to shrinking the architecture any further.
Asked during its briefing about overseas rivals opting out of the architecture, CXMT defended its strategy, saying manufacturing choices reflected each firm’s technical experiences, production lines, patent portfolios and investment plans.
CXMT on Friday posted third-quarter revenue of 118.71 billion yuan (US$17.8 billion), up 613 per cent from a year earlier, while profit reached 54 billion yuan.
The chipmaker spent 11.07 billion yuan on research and development in the first nine months, up 73 per cent from a year earlier.
South Korea’s industry leaders, meanwhile, are keeping their options open. Samsung Electronics presented a working 16-gigabit 4F² test chip at the International Solid-State Circuits Conference in February.
Rival SK Hynix told investors on Wednesday that its priority remained extending 6F² using advanced lithography, while preparing to move to 4F² or 3D DRAM when market economics and technical readiness justify a transition.
“The timing of technological development and the timing of commercialisation are distinct from each other,” SK Hynix said.
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