InquirerProsecutors trace Sara Duterte’s ₱98.6-M wealth, may call VP to testifyESPN DeportesBarcelona: tres bajas en la convocatoria para viajar a SevillaESPNCreighton lands PG Gordon, highest-ranked recruit in historyThe Jerusalem PostIran says it has conveyed conditions to re-engage in talks, end war with USוואלהילדה בת 7 נפגעה מרכב בחורה שבנגבWirtualna PolskaUSA wycofują się z Europy. Ekspertka szczerze. "Wiele ryzyk"Premium TimesMambilla: How and why Sunrise, Leno Adesanya, lost at ICC tribunal in Parisسكاي نيوز عربيةأدلة جديدة خلف مقبرة توت عنخ آمون.. هل تختبئ نفرتيتي هناك؟The South AfricanWeather: Lightning, hail and heavy rain set to batter KZNDeadlineEditors Guild Praises California’s New Post-Production Tax Credit Law As “Historic”SRF NewsYoung Boys feiern 3:2-Erfolg – Essende trifft und trifft: YB schlägt Servette nach 0:2-RückstandIl Fatto QuotidianoRoma-Inter finisce 2 a 2: il rammarico di Gasp e la fragilità di Chivu, all’Olimpico tutti soddisfatti a metà
The Daily Newsstand · Free, Always
Saturday, September 19, 2026

China makes progress in 3-nm chips without advanced lithography tools

Translate

Chinese researchers have made early strides in pushing semiconductor processing nodes below 3-nm using older lithography technology, as more advanced extreme ultraviolet lithography (EUV) tools from ASML remain blocked under US sanctions.

The breakthrough marks the latest progress in China’s drive to chart an alternative path to advanced chipmaking amid US export restrictions. Under current export control rules, Dutch equipment giant ASML is barred from selling its state-of-the-art EUV machines – essential for producing chips below the 7-nm node – to Chinese clients.

In the latest development, state-backed Chinese Academy of Sciences (CAS) has established a preliminary gate-all-around (GAA) device development path using the less advanced deep ultraviolet (DUV) lithography, Taiwanese media Digitimes reported on Thursday, citing a speech by Ye Tianchun, a veteran from the academy’s Institute of Microelectronics (IMECAS).

Ye said the institute had finished early integration for stacked nanosheet-channel GAA CMOS transistors using DUV tools. He described the result as a “new early-stage MOS transistor process path for China’s sub-3-nm advanced manufacturing”, according to the Digitimes article.

View the original on South China Morning Post

KioskNews shows a cleaned-up reading view extracted from the publisher’s page — the original always lives on their site, not ours.